Floorplanning
Posted on January 31st, 2008 by admin
Floorplanning is the act of designing a birds eye view of a structure. In terms of electronic design automation, floorplanning takes in some of the geometrical limitations in a design. Examples of this are
- bonding pads for contacting off-chip (often using wire bonding) are normally located at the circumference of the chip
- line drivers often have to be located as close to bonding pads as possible
- chip area is therefore in some cases given a minimum area in order to fit in the required number of pads
- areas are clustered in order to limit data paths thus frequently featuring defined structures such as cache RAM, multiplier, barrel shifter, line driver and arithmetic logic unit
- purchased intellectual property blocks (such as an ARM core) come in ready defined area blocks.
- some IP-blocks come with legal limitations such as permitting no routing of signals directly above the block
External links
- The PLAYOUT Chip Planner
References
- Analog VLSI Design Automation, by Sina Balkir, Günhan Dündar, A. Selcuk Ögrenci, CRC Press, ISBN 978-0849310904, 2003.
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